The invention improves the process of ion implantation and annealing, which is used to introduce dopants into a semiconductor to make pn junctions. The improvements control the motion of bulk semiconductor defects such as interstitial atoms through control of surface chemistry. This leads to a reduction of the depth and electrical resistance of the pn junction.
The invention concerns process improvements to ion implantation and annealing technology, which is used to introduce dopants into a semiconductor in order to make pn junctions. The improvements control the motion of bulk semiconductor defects such as interstitial atoms through control of surface chemistry. The surface chemistry changes the intrinsic ability of the surface to absorb defects that diffuse to it. The preferential loss of Si interstitials keeps electrically active dopant fixed in the lattice by inhibiting the "kick out" reaction that makes such dopant atoms mobile and inactive. The interstitial loss rate is controlled by the introduction of an additional step in the annealing process. The surface chemistry also changes the interaction of electrically charged defects with charges at the surface by greatly reducing the charge buildup at the surface and therefore reducing the surface repulsion effect, which increases the activated dopant concentration.
This technology can be applied to almost any product that uses higher end (< 90 nm) integrated circuits. Not relevant to technologies that use lower resolution since current pn junction technology is acceptable.
Examples of such applications include:
- Pn junction with reduced depth and increased dopant activation: Leads to transistor devices with higher performance
- Compatible with current manufacturing technologies: Avoids the large costs associated with paradigm-changing technologies
- Adjusted loss rate of interstitials to the surface: Offers highly controllable mechanism for defect engineering.