Various high aspect ratio semiconductor 3D nanostructures have begun to have profound effect on the design and performances of many types of devices, including batteries, solar cells, detectors and thermoelectrical systems. Photolithography is typically used for the fabrication of these nanostructures, which is an extremely expensive technique, especially for large area applications. This invention provides a new method for processing three dimensional (3D) periodic nanostructure patterns in semiconductor materials including Si, III-V, II-VI and other types of semiconductors.
Details
This invention describes the fabrication technique used to manufacture 3D periodic nanostructure patterns in semiconductor materials. The technique is non-lithographic and combines two fabrication techniques; superionic solid state stamping (S4) and metal assisted etching (MacEtch). S4 is a unique electrochemical stamping process, used to pattern artibrary nanoscale shapes in metallic materials (down to 15nm range) using a solid electrolyte stamp in which metal ions are immobilized. MacEtch is then used to selectively remove portions of the semiconductor, assisted by metal catalyst under a wet etching environment. Using these two methods together opens up the nanostructure world for use in large area applications.
Applications
3D nanostructure fabrication will prove useful in the areas of:
- Batteries Photovoltaics Thermoelectrics
Benefits
- Powerful hybrid fabrication technique (top-down approach)
- Fast (30 sec to a few minutes, depending on depth desired)
- Performed at room temperature
- Non-lithographical
- Low-Cost
- Scalable
- Efficient
- Fabricate both linear and annular patterns (can make circular patterns)
- High aspect ratios (resolution like no other technique, features down to 15nm range)